Physical Design Power Optimization Engineer
Join a semiconductor engineering team developing high-speed communication chips. Optimize power across physical design flows and build power estimation and modeling solutions.
Обязанности
- Optimize power for physical design blocks, top-level designs, and full-chip implementations.
- Contribute to RTL-to-GDS physical design development, including synthesis, clock distribution, place and route, timing closure, and power and noise fixes.
- Perform power estimation and develop power models.
Требования
- Bachelor’s or master’s degree in electrical engineering, computer engineering, or equivalent experience.
- At least 1 year of experience in physical design or back-end power optimization.
- Familiarity with physical design EDA tools such as Synopsys or Cadence.
- Ability to use modern AI tools to accelerate engineering workflows and problem-solving.
Будет плюсом
- Knowledge of physical design flows and methodologies, including PNR, STA, and physical verification.
- Front-end design experience.