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Package Layout Design Engineer
Не указаноПолная занятостьHardware EngineeringSemiconductors
Join a hardware team designing physical layouts for advanced IC packages used in machine-learning and data-center ASICs. Take package layouts from floor planning through tape-out and manufacturing release, working with senior engineers and cross-functional teams.
Обязанности
- Develop package layouts through floor planning, bump and pad assignment, RDL routing, substrate design, verification, and tape-out release.
- Implement layouts for advanced packaging architectures, including interposers, 3D-IC, fan-out packaging, and silicon bridges.
- Plan die placement, bump maps, power and ground distribution, signal escape routing, and decoupling capacitor placement.
- Route high-density interconnects across multilayer substrates and silicon interposers; coordinate die-level RDL and bump planning with ASIC physical design teams.
- Support layout co-optimization across die RDL, interposer or substrate, and PCB levels.
- Maintain package stack-up definitions with SI/PI and materials engineering teams.
- Run physical verification checks and support design closure.
- Refine package design rules and guidelines with foundries and OSAT partners to meet DFM requirements.
- Apply electrical constraints to layouts, including impedance-controlled routing, power-plane optimization, and critical-net shielding.
Требования
- At least five years of experience in IC package layout and physical design.
- Experience taking package designs from concept through tape-out for multilayer organic substrates or silicon interposers.
- Hands-on experience with package layout tools such as Cadence APD/SiP, Synopsys IC Packaging, or Mentor Xpedition.
- Knowledge of advanced packaging technologies, including 2.5D/3D-IC, fan-out WLP, RDL, TSV, microbumps, or silicon bridges.
- Knowledge of package design rules, DFM constraints, and physical verification such as DRC and connectivity checks.
- Experience with bump and ball map definition, escape routing, and power/ground plane design.
- Strong debugging skills and experience with verification across logic levels, from IP blocks to full systems.
- Ability to collaborate effectively with design, SI/PI, and manufacturing teams.
Будет плюсом
- Experience with formal verification, ARM or DSP architectures, or wireless standards.
- Python, Perl, TCL, Skill, or Ravel scripting for automation.
- A master’s degree with at least three years of relevant experience.
- Knowledge of substrate and interposer manufacturing, chiplet integration, package-level SI/PI, OSAT NPI or yield improvement, or HBM integration.