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Junior Physical Design Engineer
В офисеПолная занятостьHardware EngineeringElectronics Manufacturing
Join a networking silicon engineering team developing high-speed communication chips. Own block-level physical design under power, area, performance, timing, and congestion constraints.
Обязанности
- Perform block-level physical design according to specifications and power, area, and performance targets.
- Work on high-cell-count and high-speed design blocks.
- Resolve timing and congestion issues.
- Execute RTL-to-GDS development activities, including synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
- Contribute to physical design flow development.
Требования
- Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, or equivalent experience.
- At least 1 year of relevant experience.
- Experience with RTL-to-GDS flows and methodologies.
- Knowledge of physical design flows, including place and route, static timing analysis, and physical verification.
- Understanding of physical construction and integration.
- Knowledge of LVS and DRC verification methodologies.
- Familiarity with physical design EDA tools such as Synopsys or Cadence.