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VLSI Engineer
·Israel
HybridFull-timeHardware EngineeringComputer HardwareSoftware Development
Responsible for end-to-end digital ASIC/FPGA design for advanced coherent communication chips. Define architectures, implement RTL in Verilog/SystemVerilog, and collaborate with cross-functional teams. Requires B.Sc. in EE/CE, hands-on ASIC/FPGA design experience, and familiarity with verification and high-speed architectures.
Responsibilities
- Participate in end-to-end hardware development for coherent communication chips, from concept and architecture to silicon.
- Define digital block architectures, system interfaces, data paths, and high-performance throughput requirements.
- Implement complex logic design using Verilog/SystemVerilog (RTL).
- Collaborate with cross-functional R&D teams including Architecture, Verification, DSP/Algorithms, Analog, and System engineering.
- Contribute to static timing analysis (STA), synthesis checks, and verification simulation environments to ensure first-time-right silicon.
Requirements
- B.Sc. in Electrical Engineering, Computer Engineering, or related scientific discipline from a recognized university.
- Proven hands-on experience as a Digital ASIC/FPGA Designer.
- Significant expertise in RTL coding using Verilog and SystemVerilog.
- Hands-on experience in end-to-end Digital Design implementation.
- Familiarity with simulation environments and verification methodologies such as UVM/SystemVerilog Verification.
Nice to have
- Understanding of high-speed digital architectures, SerDes, DSP blocks, or networking protocols.