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Verification Engineer
·Israel
HybridFull-timeHardware EngineeringComputer Hardware ManufacturingSoftware Development
Seeking a Verification Engineer to build full-chip and system-level verification environments for a quantum computing platform. Collaborate across hardware, software, and physics teams to define methodologies and integrate VIPs.
Responsibilities
- Develop custom drivers, monitors, scoreboards, and coverage models for verification environments
- Author comprehensive test plans and define end-to-end verification methodologies
- Integrate and work with Verification IPs (VIPs) and industry protocols (PCIe, DDR, AXI)
- Build complex verification sequences and integrate reference models
- Collaborate with hardware design, software engineering, and quantum physics teams
Requirements
- 5+ years of hands-on experience in ASIC / system-level verification
- Proven ability to build verification environments from scratch
- Solid knowledge of Verification IPs (VIPs) and protocols (PCIe, DDR, AXI)
- Experience with UVM and SystemVerilog (advantage)
- Deep understanding of hardware/software interactions and system-level architectures (advantage)
- Proficiency in C, C++, Python, or SystemC (advantage)