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Technical Leader, Physical Design
·Israel
On-siteFull-timeHardware EngineeringSemiconductorsCloud Computing
Seeking a Technical Leader for the Physical Design team to own RTL-to-GDS implementation for advanced node semiconductor chips. Responsibilities include floorplanning, synthesis, place & route, timing closure, power analysis, and physical verification. Mentor team members and contribute to design flow and methodology development.
Responsibilities
- Own full physical design flow from RTL to GDS for macro and cluster-level blocks, optimizing power, area, and performance under challenging constraints.
- Perform floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power/noise analysis, physical verification, and equivalence checks.
- Drive design-backend convergence and define timing constraints.
- Participate in development of design flows and signoff methodologies using EDA tools from Synopsys and Cadence.
- Mentor team members and contribute to methodology improvements.
Requirements
- 8+ years of experience in physical design.
- Deep understanding of the complete RTL-to-GDS flow.
- Strong timing analysis expertise.
- Experience with advanced process nodes.
- Proven leadership and mentoring skills.
Nice to have
- Full-chip floorplan, layout, and timing experience.
- Experience with high-speed and low-power designs.