Senior Physical Design Engineer
Design physical blocks for high-speed communication chips, focusing on power, area, and performance. Work on RTL2GDS flows including synthesis, place and route, timing closure, and physical verification.
Responsibilities
- Physical design of blocks according to specifications under challenging constraints targeting best power, area, and performance.
- Work on a variety of challenging designs including high cell count and high-speed blocks.
- Resolve complex timing and congestion problems.
- Perform all aspects of physical design chip development (RTL2GDS): synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
- Participate in flows development.
Requirements
- B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or equivalent work experience.
- 5+ years of experience in Physical Design.
- Proven experience in RTL2GDS flows and methodologies.
- Knowledge of physical design flows and methodologies (PNR, STA, physical verification).
- Deep understanding of physical construction and integration.
- Strong background in Physical Design Verification methodology (LVS/DRC).
- Familiarity with physical design EDA tools (such as Synopsys, Cadence).