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Senior Physical Design Engineer
·Israel
On-siteFull-timeHardware EngineeringComputer Hardware Manufacturing
Design and verify advanced networking silicon through chip floorplanning, physical layout implementation, optimization, and physical verification across multiple projects.
Responsibilities
- Develop chip floorplans and pin placements
- Run, debug, and approve physical verification flows across projects
- Implement, plan, and optimize physical layouts for networking silicon
Requirements
- Bachelor’s or master’s degree in Electrical Engineering
- At least 5 years of hands-on physical layout experience
- Strong knowledge of physical verification methodologies, including ERC, LVS, and DRC
- In-depth knowledge of advanced silicon process technologies
- Familiarity with Synopsys and Cadence physical design tools
- Collaborative and autonomous working style
Nice to have
- Linux experience
- TCL, Python, or shell scripting
- Data collection and analysis experience
- Understanding of chip and die verification processes
- Interest in AI tools