Senior PCB Layout Engineer
Senior PCB Layout Engineer responsible for complete PCB development including floor planning, component placement, constraint management, and signal integrity for high-speed, high-density boards. Works with Cadence Allegro tools and ensures DFM/DFA compliance.
Responsibilities
- Collaborate with board design engineers to perform PCB layout for high-speed, high-density boards using Cadence Allegro 22.1 and Capture.
- Lead floor planning, detailed component placement, and constraint management with a focus on topology and signal integrity.
- Generate artwork files, ODB++, test reports, and electronic PCB documentation for design releases.
- Ensure designs adhere to signal integrity constraints.
- Respond to PCB manufacturer engineering queries and technical questions.
- Review Gerber and ODB++ files for accuracy and manufacturability.
- Create and maintain PCB footprints.
Requirements
- Practical Electrical Engineer or BSc in Electrical Engineering.
- 5+ years of experience in high-speed PCB design.
- Knowledge of PCB design considerations including layout, routing, timing constraints, DFM, and DFA.
- Deep understanding of High-Density Interconnect (HDI) PCB layout and signal integrity.
- Proven ability to work collaboratively while taking personal responsibility for contributions.
- Agility to adapt focus as project needs evolve.
- Excellent interpersonal and communication skills.
Nice to have
- Experience in PCB designs operating at 8GHz+ with back-drilling and stacked/staggered microvia technology using minimum laminations.
- Experience building complex multi-layer HDI PCBs for very dense placement and routing.
- Knowledge of DFT constraints in volume manufacturing.