Senior Chip Architect
Architect next-generation NIC and DPU products. Define system architecture, optimize performance, and debug full-chip issues. Collaborate with software, ASIC design, and verification teams.
Responsibilities
- Learn and understand NIC microarchitecture across all aspects and serve as an information source for design and verification teams.
- Define next generation systems, working closely with GPU and CPU teams on cutting-edge systems.
- Define implementation of sophisticated features, balancing architecture with backend, execution, and design considerations.
- Understand system requirements and help define the POR for NIC and DPU product lines.
- Address challenging full-chip correctness and performance issues requiring cross-unit understanding.
- Work with board and package design to understand power, di/dt, temperature, and signal integrity limitations.
- Understand SoC flows, PCIe, Ethernet, InfiniBand, and NvLink protocols.
Requirements
- B.Sc./M.Sc in Electrical Engineering from a recognized university with excellent grades.
- 5+ years of experience in ASIC design, microarchitecture, architecture, or performance.
- At least 4 years of hands-on experience writing Verilog or VHDL.
- Exceptional analytic capabilities and passion for solving logical issues.
- Strong debug skills and ability to drive complex activities involving multiple interfaces.
- Good communication skills.