Physical Design Technical Lead
Lead the physical design of cutting-edge semiconductor chips for cloud computing. Drive all aspects of chip development from RTL2GDS, including floorplanning, synthesis, timing analysis, and physical verification. Mentor team members and develop implementation methodologies.
Responsibilities
- Lead all phases of physical design from RTL to GDSII, including floorplanning, synthesis, clock tree synthesis, place and route, and static timing analysis.
- Perform power and noise analysis, physical verification, and equivalence checks.
- Define and refine timing constraints and drive design-backend convergence.
- Take full ownership of physical design for macro and cluster levels, optimizing for power, area, and performance.
- Develop and improve design flows and methodologies using EDA tools from Synopsys and Cadence.
Requirements
- 8+ years of experience in physical design of semiconductor chips.
- Deep understanding of the complete RTL-to-GDSII flow.
- Expert-level knowledge of timing analysis and closure.
- Experience with advanced process nodes.
- Proven leadership and mentoring abilities.
Nice to have
- Full-chip design experience including floorplanning, layout, and timing.
- Experience with high-speed or multi-voltage low-power designs.