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Physical Design Power Optimization Engineer
·Israel
On-siteFull-timeHardware EngineeringComputer Hardware Manufacturing
Join a high-speed networking silicon team optimizing chip power across physical design flows, from RTL synthesis through GDS, timing closure, modeling, and noise reduction.
Responsibilities
- Optimize power for physical design blocks, top-level designs, and full-chip implementations
- Improve power across RTL-to-GDS development, including synthesis, power and clock distribution, place-and-route, timing closure, and power and noise fixes
- Perform power estimation and develop power models
Requirements
- Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, or equivalent experience
- At least 2 years of physical design or back-end power optimization experience
- Familiarity with physical design EDA tools such as Synopsys or Cadence
- Strong problem-solving, collaboration, and interpersonal skills
Nice to have
- Knowledge of PNR, static timing analysis, and physical verification flows
- Front-end design experience
- Master’s degree in Electrical or Computer Engineering