G
Machine Learning Hardware Architect
·Israel
On-siteFull-timeHardware EngineeringInformation TechnologyCloud Computing
Join a team shaping the future of AI/ML hardware acceleration. As a Machine Learning Hardware Architect, you will bridge model architecture innovation and next-generation hardware design, defining the roadmap for high-performance, power-efficient accelerators used in massive-scale training and inference.
Responsibilities
- Define and drive the technical roadmap and architecture for the hardware/software stack to ensure exceptional performance for ML models.
- Act as the technical liaison across research, software, and hardware teams, steering model architecture innovation to maximize scaling, quality, and hardware efficiency.
- Architect next-generation configurable simulation frameworks and performance models, setting the organizational standard for evaluating complex microarchitectural decisions.
- Drive high-stakes choices regarding Power, Performance, Area (PPA) and buildability for future chip and system architectures, balancing long-term technological trends with product delivery timelines.
- Guide system-level performance analysis across highly distributed ML systems, innovating methodologies to optimize compute, memory bandwidth, and inter-chip network requirements.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
- 12 years of experience in computer architecture, chip architecture, or hardware-software co-design.
- Experience architecting and developing software systems in C++ or Python for performance modeling, simulation, or system analysis.
Nice to have
- Master’s degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science with an emphasis on computer architecture.
- Experience as a lead architect managing multi-generational hardware solutions or performance optimizations for massive-scale ML training and inference.
- Experience in semiconductor technologies, industry trends, and the future trajectory of process, memory, interconnects, and packaging.
- Experience with deep learning frameworks (e.g., TensorFlow, PyTorch) and deep understanding of their underlying execution models.