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Design Verification Engineer
·Israel
Not specifiedFull-timeHardware EngineeringSemiconductor Manufacturing
As a Design Verification Engineer, you will develop functional verification environments, including reference models and bus-functional monitors and drivers. You will write verification test plans using random techniques and coverage analysis, develop tests, debug failures, and verify boot code. You will also architect, develop, and maintain tools for multi-core SoCs.
Responsibilities
- Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers.
- Write verification test plans using random techniques and coverage analysis, ensuring completeness with designers.
- Develop tests and tune the environment to achieve coverage goals.
- Debug failures and work with designers to resolve issues.
- Verify boot code and architect, develop, and maintain tools for multi-core SoCs.
- Transform engineering team requirements into scalable software tools within a highly parallel compute environment.
- Perform unit and regression testing of software tools.
Requirements
- BS in Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of verification and firmware/software development experience, or MS/PhD with 5+ years experience.
- Experience with System Verilog and UVM.
- Experience writing detailed test plans and building sophisticated directed random verification environments.
- Experience with scripting languages such as Python or Perl and EDA verification tools.
- Experience with Object-Oriented Design and implementation.
- Good understanding of Linux OS.
Nice to have
- Strong programming skills in C++ and ARM assembly.
- Understanding of networking protocols.