SoC Design Automation Engineer
Develop and support clock-related design flows and automation for SoCs and networking chips, contributing to integration and design closure across projects.
תחומי אחריות
- Develop and maintain design automation and methodologies for SoC and networking clock flows.
- Work with design, STA, and project teams to support timely, high-quality design closure.
- Improve SoC top-level automation scripts and flows using existing infrastructure and tools.
- Support SoC integration and construction flows across projects.
- Assist with timing, power, and noise analysis.
דרישות
- At least 2 years of experience in SoC design, design automation, or methodology development.
- A BSc or MSc in Electrical or Computer Engineering, or relevant professional experience.
- Programming or scripting skills in at least one language; Python is preferred, with Perl, Tcl, or Make also relevant.
- Understanding of physical design, including placement, routing, timing closure, and ECO implementation.
- Familiarity with EDA tools for synthesis, place-and-route, and timing analysis, such as Synopsys or Cadence flows.
יתרון
- Experience developing or maintaining SoC design or automation flows.
- Knowledge of crosstalk, noise, and delay analysis.
- Experience with power or timing optimization.