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Full-time PMO position based in Ashkelon, working Sunday through Thursday. The role supports procurement processes, SAP reporting, and information systems testing.

Lead implementation, integration, testing and operational-readiness workstreams for automated and semi-automated container terminal projects. Work with terminal operators, project teams, equipment suppliers and software vendors from implementation through commissioning and operational ramp-up. The 役

Build data-heavy interfaces and customer-facing workflows for a platform that integrates data sources. Work primarily on the frontend while contributing to backend services, APIs, and integrations. The company is globally distributed and remote-friendly.

Lead the design and development of test generators and verification frameworks for custom ASICs and SoCs, combining software engineering with hardware verification.

Develop and evaluate electro-optical systems using physics-based simulations, numerical analysis, and AI methods.

Join an engineering team developing networking platforms for advanced computing. Explore Ethernet switch technologies, define software architecture, and prototype solutions for high-performance workloads.

Join a security team responsible for application, cloud, and enterprise security, incident response, detection, and governance. Help secure cloud infrastructure and services in a globally distributed, remote-friendly company.

Lead a software engineering team while remaining hands-on in the design and development of distributed backend and networking systems. The role is approximately 50% hands-on and focuses on complex, real-time, highly available systems. Work arrangement is hybrid and employment is full-time.

Join a digital transformation program for a leading bank, building backend and frontend components for complex distributed systems in an on-premises containerized environment.

Work with customer design teams to integrate and use static timing analysis and engineering change order tools, resolve timing challenges, and improve chip design flows.