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Senior Formal Verification Engineer
Sin especificarTiempo completoSystem AssuranceAutomotive Technology
An automotive technology company is seeking an experienced Formal Verification Engineer in Haifa to verify next-generation digital hardware for autonomous driving platforms.
Responsabilidades
- Own the formal verification environment from initial development through sign-off.
- Apply formal methods to verify complex digital systems.
- Define assumptions, rules, and cover properties with hardware architects and designers.
- Help establish the team’s formal verification methodology and environment.
- Evaluate new formal verification methods and tools.
- Use verification tools including Cadence JasperGold, Verisium Manager, Xcelium, and Indago.
- Analyze verification results, identify bugs, and collaborate on design fixes.
- Develop reusable formal blocks and functions for commonly used logic.
Requisitos
- Bachelor’s degree in electrical engineering, computer engineering, or computer science.
- At least 5 years of formal verification experience.
- Experience with SystemVerilog hardware description language.
- Experience with scripting languages such as Python or Tcl.
- Strong analytical and problem-solving skills.
- Ability to work independently and collaboratively.