Chip Design Engineering Manager
Lead a team of formal verification engineers working on pre-silicon verification for complex digital designs. Set verification strategies, collaborate across engineering teams, and own timely, high-quality verification delivery.
Responsabilidades
- Lead and develop a team focused on pre-silicon formal verification of complex digital designs.
- Define verification strategies and methodologies across multiple projects.
- Work with architecture, design, and design-verification teams to identify needs and drive closure.
- Provide technical guidance and mentorship to engineers.
- Plan and deliver verification work to support quality and timely tapeouts.
Requisitos
- BSc or MSc in electrical or computer engineering, computer science, or mathematics.
- At least 5 years of managerial experience leading engineering teams in chip design or verification.
- At least 8 years of industry experience in RTL design, functional verification, or a related field.
- Strong understanding of chip design flows and verification methodologies.
Se valora
- Experience with formal verification tools such as JasperGold or VC Formal.
- Background in assertions, coverage models, or formal testbench development.
- Experience building and scaling engineering teams.