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Senior Logic/DSP Design Engineer – Mixed Signal
PresencialTiempo completoCommunications EngineeringSemiconductor Manufacturing
Design digital logic and DSP algorithms for mixed-signal IP blocks, including high-speed SerDes, ADC/DAC interfaces, calibration engines, and adaptive control systems.
Responsabilidades
- Design and implement synthesizable RTL for mixed-signal subsystems, including calibration state machines, digital filters, adaptive equalization, and clock/data recovery loops.
- Define digital-analog interfaces, calibration flows, and control logic with analog design teams.
- Perform RTL-to-gate synthesis, timing closure, and low-power implementation for mixed-signal digital blocks.
- Build and maintain block-level Verilog verification environments and AMS co-simulation flows.
- Support silicon bring-up and laboratory debug by correlating digital behavior with analog measurements.
- Document architectures, algorithms, and design decisions, and participate in design and code reviews.
- Mentor junior engineers in digital design practices within mixed-signal development flows.
Requisitos
- Bachelor’s or master’s degree in Electrical Engineering.
- At least 7 years of digital logic design experience, including exposure to mixed-signal or DSP projects.
- Strong RTL design skills with Verilog and experience with synthesis flows.
- Solid understanding of DSP fundamentals, including filtering, sampling, quantization, and timing recovery.
- Familiarity with mixed-signal verification methods such as AMS simulation, Verilog-AMS, or real-number modeling.
Se valora
- Experience with high-speed SerDes, PCIe, DisplayPort, Ethernet, or similar interface standards.
- Exposure to calibration and adaptation algorithms for ADCs, DACs, or equalizers.
- Familiarity with low-power design techniques and static timing analysis.
- Experience collaborating directly with analog designers on digital-analog co-design.