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Senior Physical Design Engineer
Sin especificarTiempo completoHardware EngineeringElectronics Manufacturing
Join a technology-focused semiconductor engineering team developing high-speed networking silicon. Own full-chip physical layout from floorplanning through tape-out and help deliver high-quality, high-performance designs.
Responsabilidades
- Perform full-chip physical layout, integration, pinning, and bump routing.
- Coordinate with block owners and project managers to drive layout convergence and quality.
- Own chip layout activities from floorplanning through tape-out.
Requisitos
- Electronics engineering certificate or bachelor’s degree in electrical engineering.
- At least 5 years of hands-on full-chip layout and physical verification experience.
- Strong knowledge of DRC, LVS, ANT, ERC, and DFM methodologies for advanced process nodes.
- Experience with Tcl, Unix, and shell scripting.
- Experience working in Linux environments.
- Familiarity with physical design EDA tools such as Synopsys ICC2 or Fusion Compiler and Cadence Innovus.
- Familiarity with physical verification tools including Synopsys ICV and Siemens Calibre.
- Strong attention to detail, self-motivation, and interpersonal skills.
Se valora
- Experience defining physical design methodologies or owning full-chip/place-and-route flows.
- Orientation toward AI tools or willingness to learn them.
- Ability to work autonomously with strong ownership and self-learning skills.