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Senior Chip Design Verification Engineer
PresencialTiempo completoHardware EngineeringElectronics Manufacturing
A semiconductor engineering team is seeking a senior engineer to verify RTL and ASIC chip designs for RISC-V processor platforms and high-speed networking silicon. The role is based in Tel Aviv or Be'er Sheva and involves close collaboration with firmware and global engineering teams.
Responsabilidades
- Verify chip blocks against specifications while balancing power, area, and performance constraints.
- Perform chip development activities including RTL verification, integration, and debugging.
- Work on a RISC-V processor platform.
- Collaborate with firmware and other engineering groups globally.
Requisitos
- At least 5 years of experience in RTL frontend ASIC verification and chip design.
- Bachelor's or master's degree in electrical engineering, communications engineering, computer engineering, or equivalent experience.
- High-level English proficiency.
Se valora
- Extensive RTL frontend ASIC verification experience.
- Strong knowledge of Specman.
- Broad understanding of system-level aspects.