C
Senior ASIC Design Engineer
PresencialTiempo completoHardware EngineeringNetworking Equipment
Join a front-end silicon design team developing large-scale programmable networking devices. The role covers microarchitecture, RTL implementation, integration, verification, timing, and post-silicon validation.
Responsabilidades
- Write and review microarchitecture specifications
- Implement RTL using Verilog and SystemVerilog to meet timing, performance, and power requirements
- Contribute to full-chip integration, timing methodology, and analysis
- Collaborate with verification engineers to resolve bugs and close coverage
- Work with physical design engineers on timing and place-and-route issues
- Improve design methodologies and engineering best practices
- Perform debug, root-cause analysis, and post-silicon validation in the lab
Requisitos
- B.Sc. or M.Sc. in Electrical Engineering from a leading university
- Experience with RTL design
- Familiarity with UVM and functional verification methodologies
Se valora
- Experience with MATLAB simulations and bit-exact modeling environments
- Familiarity with mixed-signal systems and environments
- Knowledge and hands-on experience with clock domain crossing (CDC)