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Physical Design CAD Engineer
Sin especificarTiempo completoHardware EngineeringSemiconductors
Develop and improve physical-design methodologies and implementation flows for networking chips and SoCs, working with engineering teams to deliver high-quality designs on schedule.
Responsabilidades
- Develop physical-design, synthesis, static timing analysis, and logic-equivalence methodologies for networking chips and SoCs.
- Collaborate with block owners, full-chip timing engineers, and project managers to achieve quality and schedule goals.
- Develop flows and tool methodologies for floorplanning, power and clock distribution, place and route, timing analysis and closure, power and noise analysis, and back-end verification.
- Solve challenging physical-design problems across multiple projects.
Requisitos
- Bachelor’s or master’s degree in electrical or computer engineering, or equivalent experience.
- At least 2 years of relevant experience.
- Proficiency with Python, Perl, Tcl, and Make scripting.
- Expertise in analyzing and resolving crosstalk delay, noise glitches, and electrical and manufacturing rule issues in deep-submicron processes.
- Knowledge of physical design and optimization, including placement, routing, cell sizing, buffering, logic restructuring, and ECO implementation.
- Knowledge of process-variation modeling and design convergence that accounts for variation.
- Track record of delivering designs to production.
Se valora
- Familiarity with Synopsys or Cadence synthesis, place-and-route, and static timing analysis tools.
- Experience defining methodologies or owning synthesis, place-and-route, or static timing analysis flows.