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Junior Design Verification Engineer
Sin especificarTiempo completoHardware EngineeringSemiconductor
Join a design verification team working on high-speed SerDes IP for interfaces including PCIe and Ethernet. The role covers mixed-signal verification and the full verification lifecycle, from specification through tape-out sign-off.
Responsabilidades
- Develop constrained-random and coverage-driven verification for complex high-speed SerDes mixed-signal IP
- Build and improve verification environments
- Validate DSP datapaths
- Perform firmware-hardware joint verification
- Use AI-assisted tools in daily engineering work
Requisitos
- Bachelor’s degree in electrical engineering, computer engineering, or computer science
- 0–3 years of industry or academic experience in hardware design or verification
- Solid understanding of digital design and computer architecture
- Software programming ability
Se valora
- Hands-on experience with SystemVerilog/UVM
- Python scripting for verification automation
- Familiarity with mixed-signal or analog simulation
- Knowledge of high-speed protocols such as PCIe or Ethernet
- Prior internship or experience in RTL design or verification
- Strong academic record
Beneficios
- Collaborative, innovative team environment
- Exposure to the full verification lifecycle
- Growth opportunities from the start