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Chip Design Verification Engineer
Sin especificarTiempo completoHardware EngineeringSemiconductors
Join a chip design methodologies team to build shared verification solutions and infrastructure, improve verification workflows, and ensure design correctness.
Responsabilidades
- Develop shared verification code and solutions for chip design teams.
- Create verification methodologies and improve the experience and efficiency of verification engineers.
- Work with design automation teams to deliver solutions combining verification, simulation, and automation.
- Evaluate EDA tools and apply suitable technologies to verification workflows.
- Understand designs, define verification scope, build verification infrastructure, and verify design correctness.
- Collaborate with designers and verification specialists.
- Develop and deliver training sessions.
Requisitos
- Bachelor’s degree in Electrical Engineering or Computer Science.
- At least 3 years of relevant experience.
- Exposure to design and verification tools.
- Strong interpersonal skills and an interest in innovation.
Se valora
- Experience with Specman or SystemVerilog UVM.
- Understanding of simulation tools.
- Experience building test benches, evaluating coverage, and debugging simulation failures.